Commit a98212a
sampler: pinned-host d2h via cuda.bindings when available
Default numpy d2h (np.asarray on a jax.Array) lands in pageable host memory,
which forces the CUDA driver to stage the transfer through internal pinned
scratch before copying into the user buffer. The second hop is bound by host
DRAM bandwidth and caps the effective d2h throughput well below PCIe line
rate. Pinning the destination skips the staging hop.
Measured throughput at 3.4 GB transfer (rotated surface code d=7, 10M shots):
H100 (gen4 x16) B200 (gen5 x16)
cp.asnumpy / np.asarray (pageable) 1.9 GB/s 4.1 GB/s
cudaMemcpy → cudaHostAlloc (pinned) 23.4 GB/s 51.4 GB/s
Translated to per-shot wall on the surface-code-noise sweep:
p vanilla pre-pin (+G) post-pin (+G)
1e-6 (10M shots) 0.084µs 0.162µs 0.021µs
1e-4 (10M shots) 0.176µs 0.188µs 0.021µs
1e-2 (10K shots) 4.86µs 0.102µs 0.091µs
The pinned path lifts +G from "loses to vanilla below p~1e-5" to
"monotonically faster across the whole sweep."
Implementation:
- New tsim.utils.cuda_helpers module: _PinnedBuf (RAII over cudaHostAlloc),
alloc_pinned_numpy (returns a pinned-backed ndarray with lifetime tied to
the underlying region via ctypes + ndarray.base), copy_d2h (the public
entry, picks pinned fast path or numpy fallback based on import of
cuda.bindings).
- sampler._sample_batches replaces np.asarray(combined)[:shots] with
copy_d2h(combined)[:shots] and adds the matching jax.block_until_ready
before the call.
cuda.bindings is a soft dep — when import fails, copy_d2h falls back to
np.array, preserving the prior behavior. The pyproject.toml is unchanged.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>1 parent f535cd1 commit a98212a
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