Zero impedance treatment

[jd-lara]

Add an option to handle what to do with zero impedance branches and how to interpret them.

Sienna-Platform/PowerSystems.jl#1017 (comment)

This issue arises when we find inconsistencies between parallel objects in the data

[m-bossart]

Currently, any branch with '@' or '*' at the start of the circuit identifier is parsed as a DiscreteControlledACBranch. The impedance does not determine what type of component is parsed.

Currently, I believe that all of the branch parsing code is independent of the other branches (i.e. if there is another branch in parallel, it will not change how that branch is parsed). To me, this makes sense.

In the Argentina case we have an available entry with '@'/'*' in parallel with a standard branch entry that is unavailable. What would be the alternative here besides parsing a DiscreteControlledACBranch in parallel with a Line?