Merge remote-tracking branch 'origin/main' into fs-eire/patch-dawn-em

Author: fs-eire

js/react_native/android/CMakeLists.txt

@@ -1,5 +1,5 @@
+cmake_minimum_required(VERSION 3.13)
 project(OnnxruntimeJSI)
-cmake_minimum_required(VERSION 3.9.0)
 
 set(PACKAGE_NAME "onnxruntime-react-native")
 set(BUILD_DIR ${CMAKE_SOURCE_DIR}/build)
@@ -97,3 +97,6 @@ target_link_libraries(
   ${log-lib} # <-- Logcat logger
   android # <-- Android JNI core
 )
+
+# 16KB page size support (Android 15+ requirement)
+target_link_options(onnxruntimejsi PRIVATE "-Wl,-z,max-page-size=16384")

onnxruntime/core/providers/cuda/tensor/grid_sample.cc

@@ -51,7 +51,6 @@ template <typename T, bool IsNHWC>
 GridSample<T, IsNHWC>::GridSample(const OpKernelInfo& info) : CudaKernel(info) {
   opset_start_version_ = info.node().SinceVersion();
 
-  std::string mode_str = info.GetAttrOrDefault<std::string>("mode", "bilinear");
   std::string padding_mode_str = info.GetAttrOrDefault<std::string>("padding_mode", "zeros");
   align_corners_ = static_cast<bool>(info.GetAttrOrDefault<int64_t>("align_corners", 0));
 

onnxruntime/core/providers/nv_tensorrt_rtx/nv_execution_provider_utils.h

@@ -16,7 +16,6 @@
 #include "core/framework/plugin_ep_stream.h"
 #include "core/providers/nv_tensorrt_rtx/nv_provider_options.h"
 #include "core/providers/nv_tensorrt_rtx/nv_execution_provider_custom_ops.h"
-#include "core/providers/nv_tensorrt_rtx/nv_execution_provider_utils.h"
 #include "core/providers/cuda/cuda_stream_handle.h"
 
 // D3D12 headers for graphics interop on Windows
@@ -30,6 +29,7 @@
 #include "nv_provider_factory_creator.h"
 #include "nv_data_transfer.h"
 #include "nv_allocator.h"
+#include "nv_scoped_context.h"
 
 using namespace onnxruntime;
 

onnxruntime/core/providers/nv_tensorrt_rtx/nv_provider_factory.cc

@@ -0,0 +1,42 @@
+// Copyright (c) Microsoft Corporation. All rights reserved.
+// SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+// Licensed under the MIT License.
+
+#include "nv_includes.h"
+#include "core/providers/cuda/cuda_pch.h"
+#include "core/providers/cuda/shared_inc/cuda_call.h"
+
+namespace onnxruntime {
+struct ScopedContext {
+  explicit ScopedContext(int device_id) : pushed_(true) {
+    CUcontext cu_context = 0;
+    CU_CALL_THROW(cuCtxGetCurrent(&cu_context));
+    if (!cu_context) {
+      // cuCtxGetCurrent succeeded but returned nullptr, which indicates that no CUDA context
+      // is currently set for this thread. This implicates that there is not user created context.
+      // We use runtime API to initialize a context for the specified device.
+      CUDA_CALL_THROW(cudaSetDevice(device_id));
+      CU_CALL_THROW(cuCtxGetCurrent(&cu_context));
+    }
+    CU_CALL_THROW(cuCtxPushCurrent(cu_context));
+  }
+
+  /** \brief Push an existing context (e.g. CIG context); pop on destruction. */
+  explicit ScopedContext(CUcontext ctx) : pushed_(ctx != nullptr) {
+    if (ctx != nullptr) {
+      CU_CALL_THROW(cuCtxPushCurrent(ctx));
+    }
+  }
+
+  ScopedContext(const ScopedContext&) = delete;
+
+  ~ScopedContext() {
+    if (pushed_) {
+      cuCtxPopCurrent(nullptr);
+    }
+  }
+
+ private:
+  bool pushed_ = true;
+};
+}  // namespace onnxruntime

onnxruntime/core/providers/nv_tensorrt_rtx/nv_scoped_context.h

@@ -110,9 +110,8 @@ def fuse(self, node, input_name_to_nodes, output_name_to_node):
                     )
                     return
             else:
-                # Shape inference failed. Use default skip_index=1 (no broadcasting) since both
-                # Add inputs have already been verified as non-initializer dynamic tensors above.
-                logger.debug("symbolic shape inference failed, using default skip_index for SkipLayerNormalization")
+                logger.debug("skip SkipLayerNormalization fusion since symbolic shape inference failed")
+                return
 
         gather_path = self.model.match_parent_path(add, ["Gather"], [None])
         if gather_path is not None and self.model.find_graph_input(gather_path[0].input[1]) is None:

onnxruntime/python/tools/transformers/fusion_skiplayernorm.py

@@ -37,7 +37,7 @@ TYPED_TEST(GridSampleCustomTest, test_grid_sample_20_4D_linear_zeros_mixed_bound
   test.AddAttribute("padding_mode", padding_mode);
   test.AddAttribute("align_corners", align_corners);
   test.AddOutput<TypeParam>("Y", Y_shape, Y_data);
-  RunTests(test, GetExecutionProviders(20));
+  RunTests(test, GetExecutionProviders());
 }
 
 TYPED_TEST(GridSampleCustomTest, test_grid_sample_20_4D_linear_zeros_mixed_bounds_left_top) {
@@ -69,6 +69,5 @@ TYPED_TEST(GridSampleCustomTest, test_grid_sample_20_4D_linear_zeros_mixed_bound
   test.AddAttribute("padding_mode", padding_mode);
   test.AddAttribute("align_corners", align_corners);
   test.AddOutput<TypeParam>("Y", Y_shape, Y_data);
-  RunTests(test, GetExecutionProviders(20));
+  RunTests(test, GetExecutionProviders());
 }
-

onnxruntime/test/providers/cpu/tensor/grid_sample_test_custom.inc

@@ -1082,7 +1082,7 @@ TEST_F(NvExecutionProviderExternalResourceImporterTest, FullInferenceWithExterna
     // Configure to use our CUDA stream
     char stream_address[32];
     size_t stream_addr_val = reinterpret_cast<size_t>(ort_api_->SyncStream_GetHandle(ort_stream));
-    sprintf(stream_address, "%llu", static_cast<uint64_t>(stream_addr_val));
+    sprintf_s(stream_address, "%llu", static_cast<uint64_t>(stream_addr_val));
     const char* option_keys[] = {
         // TODO we should no longer require to set the compute stream at this point but there are too many cudaSetDevice calls from allocators and stream handling (NVBUG 5822116)
         onnxruntime::nv::provider_option_names::kUserComputeStream,
@@ -1095,7 +1095,7 @@ TEST_F(NvExecutionProviderExternalResourceImporterTest, FullInferenceWithExterna
     };
     char aux_stream_address[32];
     size_t aux_streams[] = {stream_addr_val};
-    sprintf(aux_stream_address, "%llu", reinterpret_cast<uint64_t>(aux_streams));
+    sprintf_s(aux_stream_address, "%llu", reinterpret_cast<uint64_t>(aux_streams));
     std::string max_shared_mem_size = std::to_string(1024 * 28);  // 28 KiB
     const char* option_values[] = {
         stream_address,

onnxruntime/test/providers/nv_tensorrt_rtx/nv_external_resource_importer_test.cc

@@ -395,17 +395,17 @@ def test_qwen3_normalization_fusion(self):
         ssln_count = sum(1 for n in nodes if n.op_type == "SkipSimplifiedLayerNormalization")
 
         # 4 RMSNorm patterns: pre-attn, Q-norm, K-norm, post-attn.
-        # Post-attn RMSNorm has an Add parent (residual) → fused as SkipSimplifiedLayerNormalization.
-        # Remaining 3 stay as SimplifiedLayerNormalization.
+        # Fallback for SkipLayerNormalization is disabled, so post-attn RMSNorm does not fuse.
+        # All 4 stay as SimplifiedLayerNormalization.
         self.assertEqual(
             sln_count,
-            3,
-            f"Expected 3 SimplifiedLayerNormalization (pre-attn + Q-norm + K-norm), got {sln_count}",
+            4,
+            f"Expected 4 SimplifiedLayerNormalization (pre-attn + Q-norm + K-norm + post-attn), got {sln_count}",
         )
         self.assertEqual(
             ssln_count,
-            1,
-            f"Expected 1 SkipSimplifiedLayerNormalization (residual + post-attn RMSNorm), got {ssln_count}",
+            0,
+            f"Expected 0 SkipSimplifiedLayerNormalization (residual + post-attn RMSNorm failed to fuse), got {ssln_count}",
         )