nxp-t2080.config

# NXP T2080 wolfBoot Configuration
# Default board: T2080 RDB (66.66 MHz oscillator, DDR3L SODIMM)
#
# Board selection:
#   Default (no define):  T2080 RDB (66.66 MHz oscillator, DDR3L SODIMM)
#   BOARD_NAII_68PPC2:    NAII 68PPC2 (100 MHz oscillator, 8 GB DDR3)
#   BOARD_CW_VPX3152:     CW VPX3-152 (66.667 MHz oscillator, 4 GB DDR3L)
#
# For NAII 68PPC2, uncomment the line below (addresses are the same as RDB):
#CFLAGS_EXTRA+=-DBOARD_NAII_68PPC2
#
# For CW VPX3-152 (256 MB NOR flash at 0xF0000000), uncomment the BOARD
# define below AND the entire address-override block at the bottom of this
# file. That block includes OS_64BIT=1, which is REQUIRED to boot a 64-bit
# RTOS (VxWorks 7 / Green Hills INTEGRITY-178 tuMP) -- it gates the e6500 SMP
# spin-table + DDR-LAW handoff in hal/nxp_t2080.c; without it the loader runs
# but the OS hangs silently right after "do_boot: jumping".
#CFLAGS_EXTRA+=-DBOARD_CW_VPX3152

ARCH=PPC
TARGET=nxp_t2080
SIGN?=ECC384
HASH?=SHA384
IMAGE_HEADER_SIZE?=512
DEBUG?=0
DEBUG_SYMBOLS?=1
DEBUG_UART?=1
VTOR?=1
CORTEX_M0?=0
NO_ASM?=0
EXT_FLASH?=0
SPI_FLASH?=0
NO_XIP?=0
UART_FLASH?=0
ALLOW_DOWNGRADE?=0
NVM_FLASH_WRITEONCE?=0
WOLFBOOT_VERSION?=0
NO_MPU?=0
SPMATH?=1
SPMATHALL?=0
RAM_CODE?=1
DUALBANK_SWAP?=0
WOLFTPM?=0
OPTIMIZATION_LEVEL?=1
ELF?=1
DEBUG_ELF=0

# -----------------------------------------------------------------------------
# Default addresses: T2080 RDB / NAII 68PPC2 (128 MB NOR flash @ 0xE8000000)
# -----------------------------------------------------------------------------

# NOR Base Address: wolfBoot at top of flash
ARCH_FLASH_OFFSET?=0xEFFE0000

# CPC SRAM address (must match L2SRAM_ADDR in nxp_ppc.h)
L2SRAM_ADDR?=0xF8F00000

# Flash Sector Size
WOLFBOOT_SECTOR_SIZE?=0x10000

# wolfBoot start address
WOLFBOOT_ORIGIN?=0xEFFE0000
# wolfBoot partition size (custom)
BOOTLOADER_PARTITION_SIZE=0x20000

# Application Partition Size
WOLFBOOT_PARTITION_SIZE?=0x100000
# Location in Flash for Application Partition
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xEFEE0000
# Load Partition to RAM Address
WOLFBOOT_LOAD_ADDRESS?=0x19000

# Location in Flash for Update Partition
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0xEFDE0000

# Location of temporary sector used during updates
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xEFDD0000

# DTS (Device Tree)
WOLFBOOT_DTS_BOOT_ADDRESS?=0xE8040000
WOLFBOOT_DTS_UPDATE_ADDRESS?=0xE8050000
# DTS Load to RAM Address
WOLFBOOT_LOAD_DTS_ADDRESS?=0x200000

# -----------------------------------------------------------------------------
# CW VPX3-152 overrides (256 MB NOR flash @ 0xF0000000, 4 GB DDR3L)
# Uncomment ALL lines below when building for VPX3-152, AND uncomment
# CFLAGS_EXTRA+=-DBOARD_CW_VPX3152 at the top of this file. This is the
# known-good config used to boot VxWorks 7 and Green Hills INTEGRITY-178
# tuMP (Ada Scheduler) on this board.
# -----------------------------------------------------------------------------
#ARCH_FLASH_OFFSET=0xFFFE0000
#L2SRAM_ADDR=0xEE900000
#WOLFBOOT_ORIGIN=0xFFFE0000
# 8 MB partitions -- full RTOS images do not fit the 1 MB RDB default.
#WOLFBOOT_PARTITION_SIZE=0x800000
#WOLFBOOT_PARTITION_BOOT_ADDRESS=0xFF000000
#WOLFBOOT_PARTITION_UPDATE_ADDRESS=0xFE800000
#WOLFBOOT_PARTITION_SWAP_ADDRESS=0xFE7F0000
#WOLFBOOT_DTS_BOOT_ADDRESS=0xF0040000
#WOLFBOOT_DTS_UPDATE_ADDRESS=0xF0050000
#WOLFBOOT_LOAD_DTS_ADDRESS=0x03FE6000
# REQUIRED for 64-bit RTOS boot (VxWorks 7 / INTEGRITY-178 tuMP). Gates the
# e6500 SMP spin-table (0x7FEE41C0) + DDR-LAW-slot-17 handoff in
# hal/nxp_t2080.c. Without it the loader runs but the OS hangs silently after
# "do_boot: jumping" (it is NOT a missing device tree -- tuMP has no FDT
# parser; this build option is what was actually missing).
#OS_64BIT=1
# ELF staging buffer. wolfBoot copies the signed image here, then elf_load
# scatters PT_LOAD segments IN PLACE to their vaddrs. It MUST sit ABOVE the
# ELF's vaddr span (a VxWorks/INTEGRITY ELF spans ~0x2000-0x75F000) or the
# in-place loader's collide-guard silently drops the segment overlapping the
# program-header table -- the OS then executes unloaded memory and traps
# early. The 0x19000 default overlaps the span; 0x900000 is above it, below
# the 16 MB DDR stack, inside the 32 MB cache-inhibit window. Raw uImage
# kernels override this via ih_load (unaffected).
#WOLFBOOT_LOAD_ADDRESS=0x900000
# Optional: verbose pre-OS register/TLB/LAW dump for handoff debugging.
#CFLAGS_EXTRA+=-DWOLFBOOT_PPC_PRE_OS_DUMP

# Flash erase/write/read test at update partition address
#TEST_FLASH?=1

# wolfCrypt Test and Benchmark (requires larger partition size)
#WOLFCRYPT_TEST?=1
#WOLFCRYPT_BENCHMARK?=1