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Pull requests: intel/intel-xpu-backend-for-triton
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[LoadStoreOpToLLVM] Re-land eviction_policy -> LSC cache modes without the nontemporal regression
#7724
opened Aug 10, 2026 by
etiotto
Contributor
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[CI] Use self-hosted linux runner for check-paths jobs
#7723
opened Aug 10, 2026 by
kwasd
Contributor
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[CI] Make vLLM tests reusable workflow rolling/lts aware on PVC
#7722
opened Aug 10, 2026 by
kwasd
Contributor
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[TritonIntelGPU] Enable AnnotateCacheControl pass by default except on Windows
#7717
opened Aug 10, 2026 by
etiotto
Contributor
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[Launcher] Add packed-launch fast path (Fix E)
#7704
opened Aug 9, 2026 by
NathanVoldman
Contributor
•
Draft
4 of 7 tasks
[Launcher] Cache kernel num_args per specialization
#7703
opened Aug 9, 2026 by
NathanVoldman
Contributor
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5 of 7 tasks
Speed up JIT kernel launch by binding the device/stream lookups once
lts
run-benchmarks
#7695
opened Aug 7, 2026 by
mieshkiwrk
Contributor
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[RemoveLayoutConversions] Don't charge free converts an SLM round-trip
run-benchmarks
run-vllm-benchmarks
#7685
opened Aug 6, 2026 by
etiotto
Contributor
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[Launcher] Intern data_ptr string in extractPointer
#7680
opened Aug 6, 2026 by
NathanVoldman
Contributor
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5 of 7 tasks
[Frontend] Add runtime assertion for signed div/rem with negative dividend
run-vllm-tests
#7674
opened Aug 5, 2026 by
whitneywhtsang
Contributor
•
Draft
[Launcher] Re-land event-less kernel submission
lts
run-benchmarks
run-vllm-benchmarks
#7670
opened Aug 5, 2026 by
mieshkiwrk
Contributor
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Improve AccelerateMatmul.cpp for the cases of the chained dot operations.
run-benchmarks
#7668
opened Aug 5, 2026 by
chengjunlu
Contributor
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Improve the remove layout in handling loop op.
#7634
opened Aug 4, 2026 by
chengjunlu
Contributor
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Bucket unified attention autotuning by Q and KV length
#7619
opened Jul 31, 2026 by
sarah12121212
Contributor
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2/3
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Draft
[NIT] Rebuild the kernel with large GRF size to reduce the register spilling size aggressively.
run-benchmarks
#7615
opened Jul 31, 2026 by
chengjunlu
Contributor
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[LAYOUTS] Dispatch dot-operand and Gluon layouts through interfaces
#7609
opened Jul 29, 2026 by
mieshkiwrk
Contributor
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[AxisInfo][StrideInfo] Disable signed division/remainder optimizations
run-benchmarks
#7570
opened Jul 23, 2026 by
whitneywhtsang
Contributor
•
Draft
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