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digital-design-and-computer-architecture

Here are 6 public repositories matching this topic...

afrozsahar04 / FPGA-based-RISC-V-Processor-for-wearable-AI-Applications

FPGA-implemented RISC-V processor, evolved from single-cycle to 5-stage pipelined architecture for higher performance and timing efficiency. BRAM-based instruction memory optimizes FPGA usage. Fully FPGA-ready, general-purpose yet tailorable for any AI application, demonstrated with an ML heart rate anomaly detector for wearable AI.

machine-learning python3 embedded-systems assembly-language computer-architecture linear-regression-models digital-design rv32i semiconductor-devices fpga-programming vlsi-design rtl-design hardware-design cmos-circuits hardware-software-codesign risc-v-processor application-specific-integrated-circuits digital-design-and-computer-architecture

Updated Feb 22, 2026
Verilog

bberkeban / 8-bit-custom-cpu

8 Bit Custom Single Cycle CPU Design in Verilog

assembler verilog computer-architecture digital-design logic-design cpu-design custom-cpu digital-design-and-computer-architecture

Updated Jul 23, 2026
Verilog

VinhTechiee / VinhTechiee

Embedded Systems · IoT · Firmware · Digital Design

iot firmware computer-engineering verilog-hdl hcmut embedded-systems-engineering microcontrollersystems digital-design-and-computer-architecture

Updated Jul 24, 2026

Charunivethitha-S / Single-Neuron-FPGA

Pipelined artificial neuron with ReLU activation — synthesized and hardware-validated on Xilinx Artix-7 FPGA (Basys 3)

fpga neural-network verilog-hdl xilinx-vivado neuromorphic-computing edge-ai rtl-design digital-design-and-computer-architecture

Updated Jul 16, 2026
Verilog

What410802 / MusicGen

study xjtu digital-design-and-computer-architecture

Updated Jun 17, 2026
VHDL

theteamonk / RISCV

RISC V Single Cycle Processor

riscv rtl instruction-set-architecture riscv32 david-harris sarah-harris digital-design-and-computer-architecture

Updated Oct 29, 2025
Verilog

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